The present invention relates to boundary scan interface logic on integrated circuits and how the defined signal levels are used. Specifically, the present invention relates to integrated circuits operating at low voltages with a boundary scan interface, and providing for the integrated circuit to be emulated, tested, interrogated, debugged, and programmed.
The present invention relates to the type of integrated circuits which operate at a low voltage level. Typically, such integrated circuits are used in portable communications devices such as cellular telephones and hand held video games.
To reduce the cost of the customer""s end product in high volume production, the integrated circuit with a boundary scan interface operates at a low voltage. The boundary scan interface may be, for example, a microprocessor, a gate array or Digital Signal Processor. A low voltage may be considered as 1.8 or 2.5 volts DC. Such an arrangement has no logic to interface to the boundary scan interface which operates at a higher voltage, such as for example, +5 volts DC.
If an existing boundary scan adapter were attached to the customer""s end product, the boundary scan adapter and the customer""s end product may be damaged because of the potential difference of +5 VDC, on one hand, and +1.8 or 2.5 VDC, on the other hand, between the two pieces of logic. For the engineer to develop the product safely, a two step process would have to take place. A prototype would need to be designed with special voltage logic for boundary scan emulation so the software algorithms for the integrated circuit could be debugged. And thereafter, the real end product must be designed without specialized voltage logic. Such a designing procedure means the xe2x80x9cexistingxe2x80x9d boundary scan emulator cannot be used. This approach is time consuming and expensive. Two different products have to be developed, and the final product cannot be completely debugged and tested.
The referenced type of integrated circuits operate at a voltage lower than +3.3 or +5 volts DC, such as for example, 2.5 or 1.8 volts DC. These lower voltages used by the integrated circuit preclude the use of existing boundary scan adapters. Existing boundary scan adapters expect to interface with boundary scan logic operating at 3.3 or 5.0 volts DC. This means existing boundary scan adapters cannot be used to test, interrogate, debug software algorithms, and program non-volatile memories in the system.
It is, therefore, a feature of the present invention to provide an adjustable voltage boundary scan adapter, used for emulation and test, that can operate with integrated circuit boards having low voltages.
A feature of the present invention is to provide an adjustable voltage boundary scan adapter, when used for emulation and test, that does not require additional support circuitry around the integrated circuit.
Another feature of the present invention is to provide an adjustable voltage boundary scan adapter that can be have its interface logic voltage levels adjusted to match the voltage levels present on the integrated circuit.
Another feature of the present invention is to provide an adjustable voltage boundary scan adapter to allow low voltage integrated circuits with a boundary scan interface to be tested.
Another feature of the present invention is to provide an adjustable voltage boundary scan adapter to allow low voltage integrated circuits with a boundary scan interface to be interrogated.
Yet another feature of the invention is to provide an adjustable voltage boundary scan adapter to allow low voltage integrated circuits with a boundary scan interface to debug software algorithms.
Still another feature of the present invention is utilizing an adjustable voltage boundary scan adapter to allow low voltage integrated circuits with a boundary scan interface to program non-volatile memory in the system without special logic in the system.
Additional features and advantages of the invention will be set forth in part in the description which follows, and in part will become apparent from the description, or may be learned by practice of the invention. The features and advantages of the invention may be realized by means of the combinations and steps particularly pointed out in the appended claims.
To achieve the foregoing objects, features, and advantages and in accordance with the purpose of the invention as embodied and broadly described herein, an adjustable voltage boundary scan adapter that can be used for emulation and test is provided. The purpose of the adjustable voltage boundary scan adapter of the present invention is to allow low voltage integrated circuits with a boundary scan interface to be tested, interrogated, software algorithms debugged, and non-volatile memory in the system programmed without special logic in the system.
The adjustable voltage boundary scan adapter of the present invention allows the user to select the voltage level at which an integrated circuit boundary scan interface will operate. In one embodiment, this selection is done with a rotary selection switch on the adjustable voltage boundary scan adapter. Other embodiments could include making this selection with a potentiometer or physical jumper connection. The adjustable voltage boundary scan adapter has a programmable integrated circuit which reads the switch setting selections and adjusts its boundary scan signal levels accordingly.
In one embodiment, an apparatus for emulating, testing, interrogating, debugging, and programming an integrated circuit is provided comprising a boundary scan adapter and an interface associated with the integrated circuit. The boundary scan adapter is in association with a host computer for accepting a control signal from the host computer, and for generating an intermediate signal for acceptance by the integrated circuit. The intermediate signal is compliant with the specifications of the integrated circuit. The interface associated with the integrated circuit is for accepting the intermediate signal from the boundary scan adapter. The control signal from the host computer has a magnitude greater than the magnitude of the intermediate signal which intermediate signal is specific to and compliant with the operation of the integrated circuit.
In another embodiment, an apparatus for emulating, testing, interrogating, debugging, and programming an integrated circuit is provided comprising a host computer, a boundary scan adapter and an interface associated with the integrated circuit. The host computer generates a control signal for the apparatus. The boundary scan adapter is in association with the host computer for accepting the control signal from the host computer, and for generating an intermediate signal for acceptance by the integrated circuit. The intermediate signal is compliant with the specifications of the integrated circuit. The boundary scan adapter comprises a controller for accepting the control signal from the host computer and for generating a driver signal, the driver signal being at least one of equal to or not equal to the control signal, and a pin driver/receiver for receiving the driver signal from the controller and for generating an intermediate signal for acceptance by the integrated circuit which intermediate signal is compliant with the specifications of the integrated circuit. The interface associated with the integrated circuit accepts the intermediate signal from the boundary scan adapter. The control signal from the host computer has a magnitude greater than the magnitude of the intermediate signal which intermediate signal is specific to and compliant with the operation of the integrated circuit.
The following sequence is an example used by the adjustable voltage boundary scan adapter to determine the voltage at which to set its boundary scan signal levels.
1. When the cable from the adjustable voltage boundary scan adapter is plugged into a logic card resident in a personal computer and power is applied to the adjustable voltage boundary scan adapter, LEDs (light emitting diodes) will flash for a specified period of time.
2. A multi-position rotary switch is read by a microprocessor and the voltages are set per an appropriate table of values.
3. The presence/power detect (PD) signal is monitored until its voltage level exceeds the Power Detect Input Threshold. An LED under the control of a microprocessor will flash until this condition is met.
4. When the integrated circuit power is detected the JTAG outputs of the adjustable voltage boundary scan adapter will be enabled.
5. Once the JTAG outputs are enabled, the test-reset-input (TRST) line is monitored and the microprocessor will flash an LED until the TRST line is taken high by the software driver of the adapter in the personal computer. Once the TRST line is taken high, EMUO will be released from its Wait-In-Reset value and return to a tri-state condition. The LED will then turn off.
6. When target power is detected and TRST is high, and the LEDs will reflect the rotary switch setting.
7. The PD and TRST pins are monitored continuously. If either signal drops below its high threshold then the power detection sequence will start over at step #2.